36 #define SPW_DSC_COUNT 32 57 #define SW_CONTROL_RESET_AMBA ((uint32_t)(1 << 0)) 58 #define SW_CONTROL_RESET_DMA ((uint32_t)(1 << 1)) 59 #define SW_CONTROL_LINK_START ((uint32_t)(1 << 2)) 60 #define SW_CONTROL_AUTOSTART ((uint32_t)(1 << 3)) 61 #define SW_CONTROL_LINK_DISABLE ((uint32_t)(1 << 4)) 62 #define SW_CONTROL_ALLOW_TIMECODE_TX ((uint32_t)(1 << 5)) 63 #define SW_CONTROL_RESTART_RX_DMA ((uint32_t)(1 << 6)) 64 #define SW_CONTROL_RESTART_TX_DMA ((uint32_t)(1 << 7)) 65 #define SW_CONTROL_CANCEL_TX_DMA ((uint32_t)(1 << 8)) 66 #define SW_CONTROL_INT_EN_LINK_UP_DOWN ((uint32_t)(1 << 9)) 67 #define SW_CONTROL_INT_EN_TIME_CODE ((uint32_t)(1 << 10)) 68 #define SW_CONTROL_INT_EN_RX_DSCR_COMPLETE ((uint32_t)(1 << 11)) 69 #define SW_CONTROL_INT_EN_TX_DSCR_COMPLETE ((uint32_t)(1 << 12)) 70 #define SW_CONTROL_INT_EN_RX_PACKET ((uint32_t)(1 << 13)) 71 #define SW_CONTROL_DESCTABLESIZE(x) (__RO (uint32_t)(x & 0xF << 24)) 76 #define SW_STATUS_LINK_STATUS_DISABLED ((uint32_t)(0x0 << 0)) 77 #define SW_STATUS_LINK_STATUS_START ((uint32_t)(0x1 << 0)) 78 #define SW_STATUS_LINK_STATUS_CONNECTED ((uint32_t)(0x2 << 0)) 79 #define SW_STATUS_LINK_STATUS_ENABLED ((uint32_t)(0x3 << 0)) 80 #define SW_STATUS_DISCONNECT_ERR ((uint32_t)(1 << 2)) 81 #define SW_STATUS_PARITY_ERR ((uint32_t)(1 << 3)) 82 #define SW_STATUS_ESCAPE_ERR ((uint32_t)(1 << 4)) 83 #define SW_STATUS_CREDIT_ERR ((uint32_t)(1 << 5)) 84 #define SW_STATUS_RX_DMA_RUNNING ((uint32_t)(1 << 6)) 85 #define SW_STATUS_TX_DMA_RUNNING ((uint32_t)(1 << 7)) 86 #define SW_STATUS_AHB_ERR ((uint32_t)(1 << 8)) 87 #define SW_STATUS_RECEIVED_TIMECODE ((uint32_t)(1 << 10)) 88 #define SW_STATUS_RX_COMPLETE ((uint32_t)(1 << 11)) 89 #define SW_STATUS_TX_COMPLETE ((uint32_t)(1 << 12)) 90 #define SW_STATUS_PACKET_RX ((uint32_t)(1 << 13)) 91 #define SW_STATUS_RXFIFO_EMPTY ((uint32_t)(1 << 14)) 97 #define SW_TXSCALER_DIVISOR(x) ((uint32_t)((x & 0xFF) << 0)) 102 #define SW_RXDESCPTR_DSCR_NUM(x) ((uint32_t)((x & 0x1F) << 3)) 103 #define SW_RXDESCPTR_DSCR_ADDR(x) ((uint32_t)((x & 0xFFFFFF) << 8)) 108 #define SW_TXDESCPTR(x) ((uint32_t)((x & 0x1F) << 3)) 109 #define SW_TXDESCPTR_DSCR_ADDR(x) ((uint32_t)((x & 0xFFFFFF) << 8)) 114 #define SW_TxScalerLink_DIVISOR(x) ((uint32_t)((x & 0xFF) << 0)) 119 #define SW_ResetTime_RESET_TIME(x) ((uint32_t)((x & 0x3FF) << 0)) 124 #define SW_DISCONNECTTIME_DISCONNECT_TIME(x) ((uint32_t)((x & 0xFF) << 0)) 129 #define SW_Endianness_RX_ENDIAN(x) ((uint32_t)(x << 1)) 130 #define SW_Endianness_TX_ENDIAN(x) ((uint32_t)(x << 0)) 155 #define SW_DMA_DSC_HEADER_NUM(x) ((uint32_t)((x & 0xFFFF) << 0)) 156 #define SW_DMA_DSC_HEADER_EN ((uint32_t)(1 << 16)) 157 #define SW_DMA_DSC_HEADER_WR ((uint32_t)(1 << 17)) 158 #define SW_DMA_DSC_HEADER_IE ((uint32_t)(1 << 18)) 159 #define SW_DMA_DSC_HEADER_DONE ((uint32_t)(1 << 19)) 160 #define SW_DMA_DSC_HEADER_EOP ((uint32_t)(1 << 20)) 161 #define SW_DMA_DSC_HEADER_EEP ((uint32_t)(1 << 21)) 167 void SPW_Init(SPW_T *pSPW);
Структура для таблицы DMA дескрипторов Spacewire.
Этот файл содержит структуры, макросы и функции необходимые для работы с дополнительными типами...
__RW uint32_t TXSCALERLINK
void SPW_freq(uint8_t freq_num)
Выбор тактовой частоты блоков Spacewire.
void SPW_DeInit(SPW_T *pSPW)
Денициализация SpaceWire.
Структура для DMA дескриптора SpaceWire.
__RW uint32_t DISCONNECTTIME
Структура для доступа к регистрам Spacewire.