78 #define Reset_request(x) ((uint32_t)(x << 0)) 79 #define Receive_Interrupt_Enable(x) ((uint32_t)(x << 1)) 80 #define Transmit_Interrupt_Enable(x) ((uint32_t)(x << 2)) 81 #define Error_Interrupt_Enable(x) ((uint32_t)(x << 3)) 82 #define Overrun_Interrupt_Enable(x) ((uint32_t)(x << 4)) 87 #define Transmission_request(x) ((uint32_t)(x << 0)) 88 #define Abort_transmission(x) ((uint32_t)(x << 1)) 89 #define Release_receive_buffer(x) ((uint32_t)(x << 2)) 90 #define Clear_data_overrun(x) ((uint32_t)(x << 3)) 95 #define Receive_buffer_status(x) ((uint32_t)(x << 0)) 98 #define Data_overrun_status(x) ((uint32_t)(x << 1)) 101 #define Transmit_buffer_status(x) ((uint32_t)(x << 2)) 104 #define Transmission_complete(x) ((uint32_t)(x << 3)) 107 #define Receive_status(x) ((uint32_t)(x << 4)) 108 #define Transmit_status(x) ((uint32_t)(x << 5)) 109 #define Error_Status(x) ((uint32_t)(x << 6)) 110 #define Bus_status(x) ((uint32_t)(x << 7)) 115 #define Receive_interrupt(x) ((uint32_t)(x << 0)) 116 #define Transmit_interrupt(x) ((uint32_t)(x << 1)) 117 #define Error_interrupt(x) ((uint32_t)(x << 2)) 118 #define Data_overrun_interrupt(x) ((uint32_t)(x << 3)) 127 __WO uint32_t COMMAND;
128 __RO uint32_t STATUS;
129 __RO uint32_t INTERRUPT;
130 __RW uint32_t Interrupt_enable;
134 uint32_t reserved3[3];
135 __RO uint32_t Arbitration_lost_capture;
136 __RO uint32_t Error_code_capture;
137 __RW uint32_t Error_warning_limit;
138 __RW uint32_t RX_error_counter;
139 __RW uint32_t TX_error_counter;
146 __RW uint32_t FI_SFF_FI_EFF_Acceptance_code_0;
147 __RW uint32_t ID_1_Acceptance_code_1;
148 __RW uint32_t ID_2_Acceptance_code_2;
149 __RW uint32_t Data1_ID_3_Acceptance_code_3;
150 __RW uint32_t Data2_ID_4_Acceptance_mask_0;
151 __RW uint32_t Data3_Data1_Acceptance_mask_1;
152 __RW uint32_t Data4_Data2_Acceptance_mask_2;
153 __RW uint32_t Data5_Data3_Acceptance_mask_3;
156 __RW uint32_t Data8_Data6;
157 __RW uint32_t FIFO1_Data7;
158 __RW uint32_t FIFO2_Data8;
159 __RO uint32_t RX_message_counter;
161 __RW uint32_t Clock_divider;
168 #define Reset_mode(x) ((uint32_t)(x << 0)) 170 #define Listen_only_mode(x) ((uint32_t)(x << 1)) 171 #define Self_test_mode(x) ((uint32_t)(x << 2)) 172 #define Acceptance_filter_mode(x) ((uint32_t)(x << 3)) 177 #define Transmission_request(x) ((uint32_t)(x << 0)) 178 #define Abort_transmission(x) ((uint32_t)(x << 1)) 179 #define Release_receive_buffer(x) ((uint32_t)(x << 2)) 180 #define Clear_data_overrun(x) ((uint32_t)(x << 3)) 181 #define Self_reception_request(x) ((uint32_t)(x << 4)) 191 #define Receive_interrupt_ext(x) ((uint32_t)(x << 0)) 192 #define Transmit_interrupt_ext(x) ((uint32_t)(x << 1)) 193 #define Error_warning_interrupt(x) ((uint32_t)(x << 2)) 194 #define Data_overrun_interrupt_ext(x) ((uint32_t)(x << 3)) 195 #define Error_passive_interrupt(x) ((uint32_t)(x << 5)) 196 #define Arbitration_lost_interrupt(x) ((uint32_t)(x << 6)) 197 #define Bus_error_interrupt(x) ((uint32_t)(x << 7)) 207 #define Bit_number(x) ((uint32_t)((x&0x1F) << 0)) 212 #define Segment(x) ((uint32_t)((x&0x1F) << 0)) 239 #define Direction(x) ((uint32_t)((x) << 5)) 240 #define Error_Code(x) ((uint32_t)((x&0x3) << 6)) 252 #define Clock_divisor(x) ((uint32_t)((x&0x7) << 0)) 253 #define Clock_off(x) ((uint32_t)((x) << 3)) 254 #define CAN_mode(x) ((uint32_t)((x) << 7)) 259 #define BRP(x) ((uint32_t)((x&0x3F) << 0)) 260 #define SJW(x) ((uint32_t)((x&0x3) << 6)) 265 #define TSEG1(x) ((uint32_t)((x&0xF) << 0)) 266 #define TSEG2(x) ((uint32_t)((x&0x3) << 4)) 267 #define SAM(x) ((uint32_t)(x << 7)) __RW uint32_t ACEPTANCE_CODE
__RW uint32_t Clock_divider
__RW uint32_t TX_data_byte_6
Этот файл содержит структуры, макросы и функции необходимые для работы с дополнительными типами...
__RW uint32_t TX_data_byte_4
__RO uint32_t RX_id2_rtr_dlc
__RO uint32_t RX_data_byte_8
__RW uint32_t TX_data_byte_5
__RW uint32_t BUS_TIMING_0
__RO uint32_t RX_data_byte_2
__RO uint32_t RX_data_byte_6
__RW uint32_t TX_data_byte_1
__RW uint32_t BUS_TIMING_1
__RO uint32_t RX_data_byte_1
__RO uint32_t RX_data_byte_5
__RW uint32_t TX_data_byte_8
__RW uint32_t TX_data_byte_3
__RO uint32_t RX_data_byte_7
Структура для доступа к регистрам контроллера CAN в базовом режиме.
__RW uint32_t TX_id2_rtr_dlc
__RW uint32_t ACEPTANCE_MASK
__RO uint32_t RX_data_byte_4
__RO uint32_t RX_data_byte_3
Структура для доступа к регистрам контроллера CAN в расширеном режим режиме.
__RW uint32_t TX_data_byte_2
__RW uint32_t TX_data_byte_7